1. Field
Example embodiments relate to a method of fabricating a complementary metal-oxide-semiconductor (CMOS) transistor using germanium condensation and a CMOS transistor formed from the same, and more particularly, to a method of fabricating a p-MOS transistor and an n-MOS transistor by simultaneously condensing germanium (Ge) in a p-MOS region and an n-MOS region and a CMOS transistor formed from the same.
2. Description of the Related Art
A major approach for increasing an operating speed of silicon based semiconductor devices is scaling down thereof. However, scaling down of semiconductor devices has reached limits, and heat emission caused by an increased number of devices is a problem. In order to address the heat emission problem, many studies on a higher mobility channel have been conducted.
A CMOS transistor may include a p-MOS transistor and an n-MOS transistor on a single substrate. In order to form the p-MOS transistor and the n-MOS transistor on a single substrate, a p-channel and an n-channel may be formed using materials different from each other. For example, the p-channel may be formed of strained Si and the n-channel may be formed of a Group III-V semiconductor. However, this method may include an epitaxial growing process, which is complicated and expensive.